LTC2872 [Linear Systems]
RS232/RS485 Dual Multiprotocol Transceiver with Integrated Termination; RS232 / RS485双多协议收发器，集成终端
| 型号： | LTC2872 |
| 厂家： | 
Linear Systems |
| 描述： | RS232/RS485 Dual Multiprotocol Transceiver with Integrated Termination |
| 文件： | 总28页 (文件大小：441K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC2872
RS232/RS485 Dual
Multiprotocol Transceiver
with Integrated Termination
FeaTures
DescripTion
The LTC®2872 is a robust pin-configurable transceiver
that supports RS232, RS485, and RS422 standards while
operating on a single 3V to 5.5V supply. The LTC2872 can
be configured as four RS232 single-ended transceivers
or two RS485 differential transceivers, or combinations
of both, on shared I/O lines.
n
Four RS232 and Two RS485 Transceivers
n
3V to 5.5V Supply Voltage
n
20Mbps RS485 and 500kbps RS232
n
Automatic Selection of Integrated RS485 (120Ω)
and RS232 (5kΩ) Termination Resistors
n
Half-/Full-Duplex RS485 Switching
n
Logic Loopback Mode
Pin-controlled integrated termination resistors allow
for easy interface reconfiguration, eliminating external
resistors and control relays. Half-duplex switches allow
four-wire and two-wire RS485 configurations. Loopback
mode steers the driver inputs to the receiver outputs for
diagnostic self-test. The RS485 receivers support up to
256 nodes per bus, and feature full failsafe operation for
floating, shorted or terminated inputs.
n
High ESD: ±±6kV on Line I/O
n
±.7V to 5.5V Logic Interface
n
Supports Up to 256 RS485 Nodes
n
RS485 Receiver Full Failsafe Eliminates UART Lockup
n
Available in 38-Pin 5mm × 7mm QFN Package
applicaTions
n
Flexible RS232/RS485/RS422 Interface
n
An integrated DC/DC boost converter uses a small induc-
tor and one capacitor, eliminating the need for multiple
supplies for driving RS232 levels.
Software Selectable Multiprotocol Interface Ports
n
Point-of-Sale Terminals
n
Cable Repeaters
n
L, LT, LTC, LTM, Linear Technology, the Linear logo and µModule are registered trademarks of
Linear Technology Corporation. All other trademarks are the property of their respective owners.
Protocol Translators
n
PROFIBUS-DP Networks
Typical applicaTions
RS485 Mode with Duplex Control
RS232 Mode
Mixed Mode with RS485 Termination
1.7V TO V
3V TO 5.5V
22µH
1.7V TO V
3V TO 5.5V
22µH
1.7V TO V
CC
3V TO 5.5V
22µH
CC
CC
470nF
470nF
470nF
2.2µF
2.2µF
2.2µF
2.2µF
2.2µF
2.2µF
V
CAP
SW
LTC2872
V
V
CAP
SW
LTC2872
V
V
CAP
SW
LTC2872
V
CC
L
CC
L
CC
L
RS485
FULL HALF
DUPLEX
RS485
OFF ON
H/F
TE485-1
DY1
Y1
DY1
Y1
Y1
TERMINATION
DY1
120Ω
120Ω
Z1
Z1
A1
DZ1
RA1
Z1
A1
RA1
DY2
A1
B1
RA1
DY2
B1
Y2
RB1
DY2
B1
Y2
Y2
Z2
DZ2
RA2
DZ2
RA2
Z2
A2
Z2
A2
A2
B2
RA2
B2
B2
EE
RB2
RB2
V
V
V
DD
V
V
DD
V
DD
EE
EE
2.2µF
2.2µF
2.2µF
2.2µF
2.2µF
2.2µF
2872f
2872 TA01
1
LTC2872
absoluTe MaxiMuM raTings
pin conFiguraTion
(Note 1)
TOP VIEW
Input Supplies
V , V ..................................................... –0.3V to 7V
CC
L
38 37 36 35 34 33 32
Generated Supplies
................................................V – 0.3V to 7.5V
V
1
2
3
4
5
6
7
8
9
31
V
CC
CC
V
DD
CC
A1
B1
30 A2
V .........................................................0.3V to –7.5V
EE
DD
B2
Y2
29
28
V
– V ..............................................................±5V
EE
Y1
SW........................................... –0.3V to (V + 0.3V)
CAP............................................. 0.3V to (V – 0.3V)
DD
EE
GND
Z1
27 GND
Z2
26
39
A±, A2, B±, B2, Y±, Y2, Z±, Z2 ......................–±5V to ±5V
DY±, DY2, DZ±, DZ2, RXEN1, RXEN2, DXEN±, DXEN2,
LB, H/F, TE485_±, TE485_2,
DY1
DZ1
RXEN1
25 DY2
V
EE
24 DZ2
23 RXEN2
22 DXEN2
DXEN1 10
TE485_1 11
TE485_2 12
485/232_±, 485/232_2 ................................ –0.3V to 7V
21
20
V
V
CC
DD
FEN, RA±, RA2, RB±, RB2...............–0.3V to (V + 0.3V)
L
Differential Enabled Terminator Voltage
13 14 15 16 17 18 19
(A±-B± or A2-B2 or Y±-Z± or Y2-Z2) .....................±6V
Operating Temperature
LTC2872C ................................................ 0°C to 70°C
LTC2872I .............................................–40°C to 85°C
Storage Temperature Range .................. –65°C to ±25°C
UHF PACKAGE
38-LEAD (5mm × 7mm) PLASTIC QFN
T
= ±25°C, θ = 34.7°C/W
JA
JMAX
EXPOSED PAD (PIN #39) IS V , MUST BE SOLDERED TO PCB
EE
orDer inForMaTion
LEAD FREE FINISH
LTC2872CUHF#PBF
LTC2872IUHF#PBF
TAPE AND REEL
PART MARKING*
2872
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC2872CUHF#TRPBF
LTC2872IUHF#TRPBF
0°C to 70°C
38-Lead (5mm × 7mm) Plastic QFN
38-Lead (5mm × 7mm) Plastic QFN
2872
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
2872f
2
LTC2872
elecTrical characTerisTics The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = VL = 3.3V, TE485_1 = TE485_2 = 0V, LB = 0V unless otherwise noted.
SYMBOL PARAMETER
Power Supply
CONDITIONS
MIN
TYP
MAX
UNITS
l
l
l
V
CC
V
L
Supply Voltage Operating Range
3
5.5
V
V
Logic Supply Voltage Operating Range
V ≤ V
±.7
V
CC
L
CC
V
CC
Supply Current in Shutdown Mode
RXEN1 = RXEN2 = V ,
DXEN± = DXEN2 = FEN = H/F = 0V
8
60
µA
L
l
l
l
V
Supply Current in RS485 Transceiver Mode 485/232_± = 485/232_2 = DXEN± =
DXEN2 = V , RXEN1 = RXEN2 = 0V
4.5
5.5
0
7
8
5
mA
mA
µA
CC
(Outputs Unloaded) (Note 3)
L
V
Supply Current in RS232 Transceiver Mode DXEN± = DXEN2 = V ; 485/232_± =
CC
L
(Outputs Unloaded) (Note 3)
485/232_2 = RXEN1 = RXEN2 = 0V
V Supply Current in RS485 or RS232 Transceive DXEN± = DXEN2 = V , RXEN1 = RXEN2 = 0V
Mode (Outputs Unloaded)
L
L
RS485 Drivers
l
l
l
l
|V
|
OD
Differential Output Voltage
R = ∞, V = 3V (Figure ±)
6
V
V
V
V
L
CC
R = 27Ω, V = 4.5V (Figure ±)
2.±
±.5
2
V
L
CC
CC
CC
CC
R = 27Ω, V = 3V (Figure ±)
V
V
L
CC
R = 50Ω, V = 3.±3V (Figure ±)
L
CC
l
l
∆|V |
OD
Difference in Magnitude of Differential Output
Voltage for Complementary Output States
R = 27Ω, V = 3V (Figure ±)
0.2
0.2
V
V
L
CC
R = 50Ω, V = 3.±3V (Figure ±)
L
CC
l
l
V
Common Mode Output Voltage
R = 27Ω or 50Ω (Figure ±)
3
V
V
OC
L
∆|V
|
Difference in Magnitude of Common Mode
Output Voltage for Complementary Output States
R = 27Ω or 50Ω (Figure ±)
L
0.2
OC
l
l
I
I
Three-State (High Impedance) Output Current
V
V
= ±2V or –7V,
OUT
CC
–±00
–250
±25
250
µA
OZD485
= 0V or 3.3V (Figure 2)
Maximum Short-Circuit Current
–7V ≤ V
≤ ±2V (Figure 2)
mA
OSD485
OUT
RS485 Receiver
l
I
Input Current
V
= ±2V or –7V, V = 0V or 3.3V
–±00
±25
µA
IN485
IN
CC
(Figure 3) (Note 5)
R
IN485
Input Resistance
V
= ±2V or –7V, V = 0V or 3.3V
±25
kΩ
IN
CC
(Figure 3) (Note 5)
l
l
Differential Input Signal Threshold Voltage (A–B) –7V ≤ (A or B) ≤ ±2 (Note 5)
±200
0
mV
mV
mV
Differential Input Signal Hysteresis
B = 0V (Notes 3, 5)
±90
–65
Differential Input DC Failsafe Threshold Voltage
(A–B)
–7V ≤ (A or B) ≤ ±2 (Note 5)
–200
Differential Input DC Failsafe Hysteresis
Output Low Voltage
B = 0V (Note 5)
30
mV
V
l
l
l
l
V
V
Output Low, I(RA) = 3mA (Sinking),
0.4
0.4
OL
3V ≤ V ≤ 5.5V
L
Output Low, I(RA) = ±mA (Sinking),
V
V
V
±.7V ≤ V < 3V
L
Output High Voltage
Output High, I(RA) = –3mA (Sourcing),
V – 0.4
L
OH
3V ≤ V ≤ 5.5V
L
Output High, I(RA) = –±mA (Sourcing),
V – 0.4
L
±.7V ≤ V < 3V
L
l
l
l
Three-State (High Impedance) Output Current
Short-Circuit Output Current
0V ≤ RA ≤ V , V = 5.5V
0
±5
μA
mA
Ω
L
L
0V ≤ RA ≤ V , V = 5.5V
±±35
±56
L
L
R
Terminating Resistor
TE485 = V , A–B = 2V, B = –7V, 0V, ±0V
±08
±20
TERM
L
(Figure 8) (Note 5)
2872f
3
LTC2872
elecTrical characTerisTics The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = VL = 3.3V, TE485_1 = TE485_2 = 0V, LB = 0V unless otherwise noted.
SYMBOL PARAMETER
RS232 Driver
CONDITIONS
MIN
TYP
MAX
UNITS
l
l
l
l
V
OLD
V
OHD
Output Low Voltage
R = 3kΩ, V ≤ –6V
–5
5
–5.7
6.2
V
V
V
L
EE
EE
Output High Voltage
R = 3kΩ, V ≥ 6.5V
V
DD
L
DD
Three-State (High Impedance) Output Current
Output Short-Circuit Current
Y or Z = ±±5V
Y or Z = 0V
±±56
±90
µA
mA
±35
RS232 Receiver
Input Threshold Voltage
l
l
l
0.6
0.±
±.5
0.4
2.5
±.0
0.4
V
V
V
Input Hysteresis
Output Low Voltage
I(RA, RB) = ±mA (Sinking),
±.7V ≤ V ≤ 5.5V
L
l
Output High Voltage
I(RA, RB) = –±mA (Sourcing),
V – 0.4
L
V
±.7V ≤ V ≤ 5.5V
L
l
l
l
Input Resistance
–±5V ≤ (A, B) ≤ ±5V, Receiver Enabled
3
5
0
7
kΩ
μA
Three-State (High Impedance) Output Current
Output Short-Circuit Current
0V ≤ (RA, RB) ≤ V
±5
L
V = 5.5V, 0V ≤ (RA, RB) ≤ V
±25
±50
mA
L
L
Logic Inputs
l
l
Threshold Voltage
Input Current
0.4
0.75•V
V
L
0
±5
µA
Power Supply Generator
V
DD
V
EE
Regulated V Output Voltage
RS232 Drivers Enabled, Outputs Loaded with
7
V
V
DD
R = 3kΩ to GND, DY± = DY2 = V ,
L
L
Regulated V Output Voltage
–6.3
EE
DZ± = DZ2 = 0V (Note 3)
ESD
Interface Pins (A, B, Y, Z)
All Other Pins
Human Body Model to GND or V , Powered
±±6
±4
kV
kV
CC
or Unpowered (Note 7)
Human Body Model (Note 7)
2872f
4
LTC2872
swiTching characTerisTics The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = VL = 3.3V, TE485_1 = TE485_2 = 0V, LB = 0V unless otherwise
noted. VL ≤ VCC
.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
RS485 AC Characteristics
Maximum Data Rate
l
l
(Note 3)
20
Mbps
ns
t
t
Driver Propagation Delay
R
= 54Ω, C = ±00pF (Figure 4)
20
±
70
6
PLHD485
PHLD485
DIFF
L
l
Driver Propagation Delay Difference
R
= 54Ω, C = ±00pF (Figure 4)
ns
DIFF
L
|t
– t
PHLD485
|
PLHD485
l
l
l
t
t
Driver Skew (Y to Z)
R
R
= 54Ω, C = ±00pF (Figure 4)
±.5
7.6
±8
±5
ns
ns
ns
SKEWD485
DIFF
DIFF
L
, t
Driver Rise or Fall Time
= 54Ω, C = ±00pF (Figure 4)
L
RD485 FD485
t
t
, t
,
Driver Output Enable or Disable Time
FEN = V , R = 500Ω, C = 50pF (Figure 5)
±20
ZLD485 ZHD485
L
L
L
, t
LZD485 HZD485
l
l
t
t
, t
Driver Enable from Shutdown
Receiver Input to Output
FEN = 0V, R = 500Ω, C = 50pF (Figure 5)
0.2
55
2
ms
ns
ZHSD485 ZLSD485
L
L
, t
C = ±5pF, V = ±.5V, |A–B| = ±.5V, (Figure 6)
85
PLHR485 PHLR485
L
CM
(Note 5)
l
t
Differential Receiver Skew
C = ±5pF (Figure 6)
L
±
9
ns
SKEWR485
|t
– t
|
PLHR485
PHLR485
l
l
t
, t
Receiver Output Rise or Fall Time
C = ±5pF (Figure 6)
3
±5
85
ns
ns
RR485 FR485
L
t
t
, t
Receiver Output Enable or Disable Time FEN = V , R = ±k, C = ±5pF (Figure 7)
30
ZLR485 ZHR485
L
L
L
, t
LZR485 HZR485
l
t
, t
Termination Enable or Disable Time
FEN = V , V = 0V, V = 2V (Figure 8) (Note 5)
±00
µs
RTEN485 RTZ485
L
B
AB
RS232 AC Characteristics
Maximum Data Rate
l
l
R = 3kΩ, C = 2500pF,
±00
500
kbps
kbps
L
L
R = 3kΩ, C = 500pF (Note 3)
L
L
l
l
Driver Slew Rate (Figure 9)
R = 3kΩ, C = 2500pF
4
V/µs
V/µs
L
L
R = 3kΩ, C = 50pF
30
2
L
L
l
t
t
, t
Driver Propagation Delay
Driver Skew
R = 3kΩ, C = 50pF (Figure 9)
±
µs
ns
µs
PHLD232 PLHD232
L
L
R = 3kΩ, C = 50pF (Figure 9)
50
0.4
SKEWD232
L
L
l
l
t
t
, t
Driver Output Enable or Disable Time
FEN = V , R = 3kΩ, C = 50pF (Figure ±0)
2
ZLD232 ZHD232
L
L
L
, t
LZD232 HZD232
t
t
t
, t
Receiver Propagation Delay
Receiver Skew
C = ±50pF (Figure ±±)
L
60
25
60
0.7
200
ns
ns
ns
µs
PHLR232 PLHR232
C = ±50pF (Figure ±±)
L
SKEWR232
l
l
, t
Receiver Rise or Fall Time
C = ±50pF (Figure ±±)
L
200
2
RR232 FR232
t
t
, t
,
Receiver Output Enable or Disable Time FEN = V , R = ±kΩ, C = ±50pF (Figure ±2)
L L L
ZLR232 ZHR232
, t
LZR232 HZR232
Power Supply Generator
l
V
/V Supply Rise Time
DD EE
0.2
2
ms
FEN = , (Notes 3 and 4)
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2. All currents into device pins are positive; all currents out of device
pins are negative. All voltages are referenced to device ground unless
otherwise specified.
Note 4. Time from FEN until V ≥ 5V and V ≤ –5V. External
components as shown in typical application.
Note 5. Condition applies to A, B for H/F = 0V, and Y, Z for H/F = V .
Note 6. This IC includes overtemperature protection that is intended
DD
EE
L
to protect the device during momentary overload conditions.
Overtemperature protection activates at a junction temperature exceeding
±50°C. Continuous operation above the specified maximum operating
junction temperature may result in device degradation or failure.
Note 3. Guaranteed by other measured parameters and not tested directly.
Note 7. Guaranteed by design and not subject to production test.
2872f
5
LTC2872
Typical perForMance characTerisTics
VCC Supply Current vs Supply
Voltage in Shutdown Mode
VCC Supply Current vs Supply
Voltage in Fast Enable Mode
VCC Supply Current
vs RS485 Data Rate
4.6
4.4
4.2
4.0
3.8
3.6
3.4
3.2
3.0
200
180
160
140
120
100
80
30
25
20
15
10
5
V
CC
V
CC
= 5V
= 3.3V
ALL RS485 DRIVERS AND
RECEIVERS SWITCHING.
Y TIED TO A; Z TIED TO B,
H/F = 0V, C = 100pF
L
H/F HIGH
H/F LOW
ON Y AND Z TO GND
85°C
25°C
DRIVER AND RECEIVER
TERMINATION ENABLED
60
–40°C
40
TERMINATION DISABLED
20
0
0
3
3.5
4
4.5
5
5.5
0.1
1
10
100
3
3.5
4
4.5
5
5.5
SUPPLY VOLTAGE (V)
DATA RATE (Mbps)
INPUT VOLTAGE (V)
2872 G02
2872 G03
2872 G01
VCC Supply Current
vs Supply Voltage for RS485
at Maximum Data Rate
VCC Supply Current
vs RS232 Data Rate
RS485 Driver Differential Output
Voltage vs Temperature
240
220
200
180
160
140
120
100
80
50
45
40
35
30
25
20
15
10
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
V
V
= 5V
BOTH RS485 DRIVERS AND
RECEIVERS SWITCHING.
Y TIED TO A, Z TIED TO B
H/F = 0V
ALL RS232 DRIVERS
AND RECEIVERS
SWITCHING
CC
CC
R
= 100Ω
L
= 3.3V
R
= 54Ω
DRIVER AND RECEIVER
TERMINATION ENABLED
L
2.5nF
0.5nF
20Mbps, C = 100pF ON
R
= 100Ω
= 54Ω
L
L
Y AND Z TO GND
R
L
0.05nF
0.5nF
2.5nF
85°C
25°C
–40°C
0.05nF
V
CC
V
CC
= 5V
= 3.3V
3
3.5
4
4.5
5
5.5
0
50 100 150 200 250 300 350 400 450 500
–50
–25
0
25
50
75
100
SUPPLY VOLTAGE (V)
DATA RATE (kbps)
TEMPERATURE (°C)
2872 G05
2872 G04
2872 G06
RS485 Driver Propagation Delay
vs Temperature
RS485 Driver Short-Circuit Current
vs Short-Circuit Voltage
RS485 Driver and Receiver Skew
vs Temperature
50
40
30
20
10
0
150
100
50
3.0
2.5
2.0
1.5
1.0
0.5
0
V
CC
V
CC
= 5V
= 3.3V
V
V
V
V
= 3.3V, V = 1.7V
L
CC
CC
CC
CC
= 5V, V = 1.7V
L
= 3.3V, V = 3.3V
L
= 5V, V = 5V
L
OUTPUT LOW
DRIVER
0
–50
–100
–150
RECEIVER
OUTPUT HIGH
10
–50
–25
0
25
50
75
100
–10
–5
0
5
15
–50
–25
0
25
50
75
100
TEMPERATURE (°C)
SHORT-CIRCUIT VOLTAGE (V)
TEMPERATURE (°C)
2872 G07
2872 G08
2872 G09
2872f
6
LTC2872
Typical perForMance characTerisTics
RS485 Receiver Propagation
Delay vs Temperature
RS485 Receiver Output Voltage
vs Load Current
RS232 Receiver Input Threshold
vs Temperature
6
5
4
3
2
1
0
80
70
60
50
40
2.0
1.8
1.6
1.4
1.2
1.0
V
V
V
= 5V
= 3.3V
= 1.7V
L
L
L
V
V
V
V
= 3.3V, V = 1.7V
L
CC
CC
CC
CC
= 5V, V = 1.7V
L
= 3.3V, V = 3.3V
L
= 5V, V = 5V
L
INPUT HIGH
INPUT LOW
V
CC
V
CC
= 5V
= 3.3V
0
2
4
6
8
10
–50
–25
0
25
50
75
100
–50
–25
0
25
50
75
100
OUTPUT CURRENT (mA)
TEMPERATURE (°C)
TEMPERATURE (°C)
2872 G11
2872 G10
2872 G12
RS232 Receiver Output Voltage
vs Load Current
RS485 Termination Resistance
vs Temperature
RS232 Operation at 500kbps
6
5
4
3
2
1
0
130
128
126
124
122
120
118
116
114
112
110
V
V
V
= 5V
= 3.3V
= 1.7V
L
L
L
V
CM
V
CM
V
CM
= –7V
= 2V
= 12V
DY
DZ
Z
5V/DIV
Y
RA
RB
2872 G15
1µs/DIV
WRAPPING DATA
DOUT LOADS: 5kΩ + 50pF
0
2
4
6
8
10
–50
–25
0
25
50
75
100
OUTPUT CURRENT (mA)
TEMPERATURE (°C)
2872 G13
2872 G14
RS232 Driver Outputs Enabling
and Disabling
RS485 Operation at 20Mbps
VDD and VEE Powering Up
DY
5V/DIV
DXEN
2V/DIV
5V/DIV
FEN
Y
Z
FEN = VL
5V/DIV
1V/DIV
5V/DIV
Z
Y
V
DD
Y
FEN = 0V
Z
RA
V
EE
2872 G17
2872 G18
2872 G16
40ns/DIV
100µs/DIV
20ns/DIV
H/F HIGH
Y, Z LOADS: 120Ω (DIFF) + 50pF
2872f
7
LTC2872
pin FuncTions
V
(Pins 1, 21, 31): Input Supply (3.0V to 5.5V). Tie all
DY2(Pin25):RS485DifferentialDriver#2InputorRS232
CC
three pins together and connect 2.2µF capacitor between
Driver #2y Input.
VCC and GND.
DZ1 (Pin 8): RS232 Driver #±z Input.
DZ2 (Pin 24): RS232 Driver #2z Input.
V (Pin 35): Logic Supply (±.7V to 5.5V) for the receiver
L
outputs, driver inputs, and control inputs. This pin should
Y1 (Pin 4): RS485 Differential Driver #± Positive Output
or RS232 Driver #±y Output, RS485 Differential Receiver
#± Positive Input (Half-Duplex Mode).
be bypassed to GND with a 0.±µF capacitor if it is not tied
to V . V must be less than or equal to V for proper
CC
L
CC
operation.
Y2 (Pin 28): RS485 Differential Driver #2 Positive Output
or RS232 Driver #2y Output, RS485 Differential Receiver
#2 Positive Input (Half-Duplex Mode).
V
(Pin20):GeneratedPositiveSupplyVoltageforRS232
DD
Driver(7V).Connect2.2µFcapacitorbetweenV andGND.
DD
V (Pin39):GeneratedNegativeSupplyVoltageforRS232
EE
Z1 (Pin 6): RS485 Differential Driver #± Negative Output
or RS232 Driver #±z Output, RS485 Differential Receiver
#± Negative Input (Half-Duplex Mode).
Driver (–6.3V). Tie all pins together and connect 2.2µF
capacitor between V and GND.
EE
GND(Pins5,18,27,34):Ground.Tieallfourpinstogether.
Z2 (Pin 26): RS485 Differential Driver #2 Negative Output
or RS232 Driver #2z Output, RS485 Differential Receiver
#2 Negative Input (Half-Duplex Mode).
CAP(Pin17):ChargePumpCapacitorforGeneratedNega-
tive Supply Voltage. Connect a 470nF capacitor between
CAP and SW.
485/232_1 (Pin 13): Interface Select #± Input. A logic low
enables RS232 mode and a high enables RS485 mode for
transceiver #±. The mode determines which transceiver
inputs and outputs are accessible at the LTC2872 pins
as well as which is controlled by the driver and receiver
enable pins.
SW (Pin 19): Switch Pin. Connect 22µH inductor between
SW and V .
CC
A1 (Pin 2): RS485 Differential Receiver #± Positive Input
(Full-Duplex Mode) or RS232 Receiver #±a Input.
A2 (Pin 30): RS485 Differential Receiver #2 Positive Input
(Full-Duplex Mode) or RS232 Receiver #2a Input.
485/232_2 (Pin 14): Interface Select #2 Input. A logic low
enables RS232 mode and a high enables RS485 mode for
transceiver #2. The mode determines which transceiver
inputs and outputs are accessible at the LTC2872 pins
as well as which is controlled by the driver and receiver
enable pins.
B1 (PIn 3): RS485 Differential Receiver #± Negative Input
(Full-Duplex Mode) or RS232 Receiver #±b Input.
B2(Pin29):RS485DifferentialReceiver#±NegativeInput
(Full-Duplex Mode) or RS232 Receiver #2b Input.
RA1 (Pin 37): RS485 Differential Receiver #± Output or
RXEN1 (Pin 9): Receivers #± Enable. A logic high disables
RS232andRS485receiversintransceiver#±,leavingtheir
outputs Hi-Z. A logic low enables the RS232 or RS485
receivers in transceiver #±, depending on the state of the
Interface Select Input 485/232_±.
RS232 Receiver #±a Output.
RA2 (Pin 33): RS485 Differential Receiver #2 Output or
RS232 Receiver #2a Output.
RB1 (Pin 38): RS232 Receiver #±b Output.
RB2 (Pin 32): RS232 Receiver #2b Output.
RXEN2(Pin23):Receivers#2Enable.Alogichighdisables
RS232andRS485receiversintransceiver#2,leavingtheir
outputs Hi-Z. A logic low enables the RS232 or RS485
receivers in transceiver #2, depending on the state of the
Interface Select Input 485/232_2.
DY1 (Pin 7): RS485 Differential Driver #± Input or RS232
Driver #±y Input.
2872f
8
LTC2872
pin FuncTions
DXEN1(Pin10):Drivers#±Enable.Alogiclowdisablesthe
RS232 and RS485 drivers in transceiver #±, leaving their
outputs in a Hi-Z state. A logic high enables the RS232 or
RS485 drivers in transceiver #±, depending on the state
of the Interface Select Input 485/232_±.
H/F (Pin 15): RS485 Half-duplex Select Input for Trans-
ceivers #± and #2. A logic low is used for full duplex
operation where pins A and B are the receiver inputs and
pins Y and Z are the driver outputs. A logic high is used
for half duplex operation where pins Y and Z are both the
receiver inputs and driver outputs and pins A and B do
not serve as the receiver inputs. The impedance on A and
B and state of differential termination between A and B is
independent of the state of H/F. The H/F pin has no effect
on RS232 operation.
DXEN2(Pin22):Drivers#2Enable.Alogiclowdisablesthe
RS232 and RS485 drivers in transceiver #2, leaving their
outputs in a Hi-Z state. A logic high enables the RS232 or
RS485 drivers in transceiver #2, depending on the state
of the Interface Select Input 485/232_2.
FEN(Pin16):FastEnable.AlogichighenablesFastEnable
Mode. InfastenablemodetheintegratedDC/DCconverter
is active independent of the state of driver, receiver, and
termination enable pins allowing faster circuit enable
times than are otherwise possible. A logic low disables
Fast Enable Mode leaving the state of the DC/DC converter
dependent on the state of driver, receiver, and termina-
tion enable control inputs. The DC/DC converter powers
down only when FEN is low and all drivers, receivers, and
terminators are disabled (refer to Table ±).
TE485_1 (Pin 11): RS485 Termination Enable for Trans-
ceiver #±. A logic high enables a ±20Ω resistor between
pins A± and B±. If DZ± is also high, a ±20Ω resistor is
enabled between pins Y± and Z±. A logic low on TE485_±
openstheresistors,leavingA±/B±andY±/Z±unterminated,
independent of DZ±. The differential termination resistors
are never enabled in RS232 mode.
TE485_2 (Pin 12): RS485 Termination Enable for Trans-
ceiver #2. A logic high enables a ±20Ω resistor between
pins A2 and B2. If DZ2 is also high, a ±20Ω resistor is
enabled between pins Y2 and Z2. A logic low on TE485_2
openstheresistors,leavingA2/B2andY2/Z2unterminated,
independent of DZ2. The differential termination resistors
are never enabled in RS232 mode.
LB (Pin 36): Loopback Enable for Transceivers #± and #2.
A logic high enables Logic Loopback diagnostic mode,
internallyroutingthedriverinputlogiclevelstothereceiver
output pins within the same transceiver. This applies to
bothRS232channelsaswellastheRS485driver/receiver.
The targeted receiver must be enabled for the loopback
signal to be available on its output. A logic low disables
loopbackmode.Inloopbackmode,signalsarenotinverted
from driver inputs to receiver outputs.
2872f
9
LTC2872
block DiagraM
1.7V TO 5.5V
(≤ V
3V TO 5.5V
470nF
SW
)
CC
22µH
2.2µF
0.1µF
35
21
19
17
CAP
V
V
CC
L
15 H/F
V
DD
FEN
LB
16
36
20
39
TRANSCEIVER #1
2.2µF
V
EE
PULSE-SKIPPING
BOOST REGULATOR
f = 1.2MHz
DXEN
10
9
RXEN1
GND
2.2µF
RT232
RT485
CONTROL
LOGIC
18
TE485_1
485/232_1
11
13
V
CC
DRIVERS
1
5
GND
Y1
DY1
DZ1
232
485
232
7
8
4
RT485
120Ω
Z1
6
125k
125k
LOOPBACK
PATH
H/F
RECEIVERS
232
PORT 1
RT232
A1
B1
5k
5k
2
3
125k
RA1
RB1
RT485
37
38
485
120Ω
125k
232
DXEN2
RXEN2
TE485_2
485/232_2
DY2
22
23
12
14
25
24
33
32
TRANSCEIVER #2
V
CC
31
GND
27
28
26
30
29
Y2
Z2
A2
B2
PORT 2
DZ2
RA2
RB2
GND
34
2872 BD
2872f
10
LTC2872
TesT circuiTs
I
, I
OZD485 OSD485
Y OR Z
Z OR Y
Y
Z
R
R
L
GND
OR
GND
DY
+
DY
OR
DRIVER
DRIVER
V
OD
V
L
V
L
+
–
V
OUT
–
+
L
V
OC
–
2872 F02
2872 F01
Figure 1. RS485 Driver DC Characteristics
Figure 2. RS485 Driver Output Short-Circuit Current
I
IN485
A OR B
B OR A
RECEIVER
+
–
V
IN
V
IN
R
=
IN485
I
2872 F03
IN485
Figure 3. RS485 Receiver Input Current and Resistance (Note 5)
V
L
t
t
PLHD485
DY
Y, Z
PLHD485
Y
Z
0V
t
SKEWD485
C
C
L
L
DY
V
½V
OD
OD
R
DIFF
DRIVER
90%
10%
90%
10%
0V
0V
Y - Z
t
t
FD485
RD485
2872 F04
Figure 4. RS485 Driver Timing Measurement
2872f
11
LTC2872
TesT circuiTs
V
L
GND
OR
R
L
L
DXEN
½V
½V
L
L
t
,
ZLD485
0V
V
Y
Z
V
CC
t
t
t
LZD485
ZLSD485
C
C
L
CC
V
OR
GND
L
DY
½V
½V
Y OR Z
Z OR Y
CC
CC
DRIVER
DXEN
0.5V
0.5V
V
V
OL
OH
R
V
OR
CC
0V
GND
t
,
HZD485
ZHD485
t
L
ZHSD485
2872 F05
Figure 5. RS485 Driver Enable and Disable Timing Measurements
V
AB
0V
A–B
RA
V
/2
A
B
AB
AB
–V
AB
t
t
PLHR485
PHLR485
RA
V
V
CC
RECEIVER
CM
90%
10%
90%
½V
½V
L
C
L
L
10%
t
V
/2
0V
t
RR485
FR485
t
= t
– t
SKEWR485 PLHR485 PHLR485
2872 F06
Figure 6. RS485 Receiver Propagation Delay Measurements (Note 5)
V
L
RXEN
½V
½V
L
L
t
ZLR485
0V
t
t
A
B
LZR485
V
L
0V TO 3V
3V TO 0V
V
OR
GND
R
L
L
RA
½V
½V
RA
RA
L
L
RECEIVER
0.5V
0.5V
V
V
OL
C
L
OH
RXEN
0V
t
HZR485
ZHR485
2872 F07
Figure 7. RS485 Receiver Enable and Disable Timing Measurements (Note 5)
2872f
12
LTC2872
TesT circuiTs
V
I
AB
A
R
TERM
=
V
L
I
A
TE485
½V
½V
L
L
A
B
+
–
0V
RECEIVER
TE485
V
V
AB
t
t
RTZ485
RTEN485
90%
I
A
10%
+
–
B
2872 F08
Figure 8. RS485 Termination Resistance and Timing Measurements (Note 5)
V
L
t
DRIVER
INPUT
DRIVER
OUTPUT
PHLD232
DRIVER
INPUT
½V
L
½V
L
t
PLHD232
0V
t
t
R
F
V
OHD
OLD
R
L
C
L
3V
3V
–3V
DRIVER
INPUT
0V
0V
–3V
V
6V
t OR t
t
= |t
– t
|
SLEW RATE =
SKEWD232
PHLD232 PLHD232
F
R
2872 F09
Figure 9. RS232 Driver Timing and Slew Rate Measurements
V
L
DRIVER
OUTPUT
DXEN
½V
½V
L
L
0V OR V
L
0V
t
t
HZD232
ZHD232
DXEN
R
C
L
L
V
OHD
0.5V
0.5V
DRIVER
OUTPUT
5V
5V
0V
0V
t
t
LZD232
ZLD232
DRIVER
OUTPUT
V
OLD
2872 F10
Figure 10. RS232 Driver Enable and Disable Times
2872f
13
LTC2872
TesT circuiTs
+3V
–3V
RECEIVER
INPUT
RECEIVER
INPUT
RECEIVER
OUTPUT
1.5V
1.5V
t
t
PLHR232
PHLR232
V
C
L
L
90%
10%
90%
10%
RECEIVER
OUTPUT
½V
½V
L
L
0V
t
t
RR232
FR232
t
= |t
– t
|
SKEWR232
PLHR232 PHLR232
2872 F11
Figure 11. RS232 Receiver Timing Measurements
V
L
RECEIVER
OUTPUT
RXEN
R
½V
½V
L
L
L
GND
OR V
–3V OR +3V
0V
L
t
t
HZR232
ZHR232
RXEN
C
L
V
OHR
0.5V
0.5V
RECEIVER
OUTPUT
½V
½V
L
L
0V
t
t
LZR232
ZLR232
V
L
RECEIVER
OUTPUT
V
OLR
2872 F12
Figure 12. RS232 Receiver Enable and Disable Times
2872f
14
LTC2872
FuncTion Tables
Table 1. Shutdown and Fast Enable Modes
485/232_1 AND RXEN1 AND DXEN1 AND TE485_1 AND
DC/DC
FEN
0
485/232_2
RXEN2
DXEN2
TE485_2
H/F
X
LB
X
CONVERTER MODE AND COMMENTS
X
X
±
±
0
0
0
0
OFF
ON
Shutdown: All Main Functions Off
Fast-Enable: DC/DC Converter On Only
±
X
X
Table 2. Mode Selection Table for a Given Port (FEX = X)
485/232
RXEN
DXEN
TE485
H/F
X
LB
0
DC/DC CONVERTER MODE AND COMMENTS
0
0
±
±
±
±
±
±
0
X
0
X
0
X
X
X
0
0
±
X
±
X
X
X
X
X
X
X
X
X
X
±
X
X
X
X
ON
ON
ON
ON
ON
X
RS232 Drivers On
RS232 Receivers On
RS485 Driver On
X
0
X
0
X
0
RS485 Receiver On
X
X
0
RS485 Termination Mode (See Table 7)
RS485 Full Duplex Mode
RS485 Half Duplex Mode
RS485 Loopback Mode
0
±
0
X
X
±
ON
ON
X
±
RS232 Loopback Mode
Table 3. RS232 Receiver Mode for a Given Port (485/232 = 0)
RXEN
RECEIVER INPUT (A, B)
CONDITIONS
No Fault
RECEIVER OUTPUTS (RA, RB)
RECEIVER INPUTS (A, B)
±
0
0
0
X
0
±
X
Hi-Z
±
±25kΩ
5kΩ
No Fault
No Fault
0
5kΩ
Thermal Fault
Hi-Z
5kΩ
Table 4. RS232 Driver Mode for a Given Port (485/232 = 0)
DXENX
DRIVER INPUT (DY, DZ)
CONDITIONS
No Fault
DRIVER OUTPUT (Y, Z)
0
±
±
X
X
0
±
X
±25kΩ
No Fault
±
0
No Fault
Thermal Fault
±25kΩ
2872f
15
LTC2872
FuncTion Tables
Table 5. RS485 Driver Mode for a Given Port (485/232 = 1, TE485 = 0)
DXEN
DY
X
CONDITIONS
No Fault
Y
±25kΩ
0
Z
±25kΩ
±
0
±
±
X
0
No Fault
±
No Fault
±
0
X
Thermal Fault
±25kΩ
±25kΩ
Table 6. RS485 Receiver Mode for a Given Port (485/232 = 1, LB = 0)
RXEN
A–B (NOTE 5)
CONDITIONS
No Fault
RA
Hi-Z
0
±
0
0
0
X
X
< –200mV
No Fault
> 200mV
No Fault
±
Inputs Open or Shorted Together (DC)
X
No Fault
±
Thermal Fault
Hi-Z
Table 7. RS485 Termination for a Given Port (485/232 = 1)
TE485
DZ
X
H/F, LB
CONDITIONS
R(A TO B)
Hi-Z
R(Y TO Z)
Hi-Z
0
±
±
X
X
X
X
X
No Fault
No Fault
0
±20Ω
±20Ω
Hi-Z
Hi-Z
±
No Fault
±20Ω
Hi-Z
X
Thermal Fault
Table 8. RS485 Duplex Control for Given Port (485/232 = 1)
H/F
0
RS485 DRIVER OUTPUTS
RS485 RECEIVER INPUTS
Y, Z
Y, Z
A, B
Y, Z
±
Table 9. Loopback Functions for a Given Port
LB
0
RXEN
TRANSCEIVER MODE
X
±
0
Not Loopback
Not Loopback
±
±
Loopback (RA = DY, RB = DZ)
2872f
16
LTC2872
applicaTions inForMaTion
Overview
V
CC
C1
470nF
L1
22µH
3V TO 5.5V
The LTC2872 is a flexible multiprotocol transceiver sup-
porting RS485/RS422 and RS232 protocols. It can be
powered from a single 3.0V to 5.5V supply with optional
logic interface supply as low as ±.7V. An integrated DC/
DC converter provides the positive and negative supply
rails needed for RS232 operation. Automatically selected
integrated termination resistors for both RS232 and
RS485 protocols are included, eliminating the need for
external components and switching relays. Both parts
include loopback control for self-test and debug as well
as logically-switchable half- and full-duplex control of the
RS485 bus interface.
C4
2.2µF
35
V
21
19
17
L
V
SW
CAP
CC
1.7V TO V
CC
V
DD
V
20
39
L
C2
2.2µF
C5
0.1µF
BOOST
REGULATOR
V
EE
34 GND
GND
C3
2.2µF
18
2872 F13
Figure 13. DC/DC Converter with Required External Components
The LTC2872 offers two ports that can be independently
configured as either two RS232 receivers and drivers or
one RS485/RS422 receiver and driver depending on the
state of its 485/232 pins. Control inputs DXEN and RXEN
provide independent control of driver and receiver opera-
tion for either RS232 or RS485 transceivers, depending
on the selected operating protocol.
Inductor Selection
An inductor with a value of 22µH ±20ꢀ is required. It
must have a saturation current (I ) rating of at least
200mA and a DCR (copper wire resistance) of less than
±.3Ω. Some small inductors meeting these requirements
are listed in Table ±0.
SAT
Table 10. Recommended Inductors
MAX
TheLTC2872featuresruggedoperationwithanESDrating
of ±±5kV HBM on the receiver inputs and driver outputs,
both powered and unpowered. All other pins offer protec-
tion exceeding ±4kV.
L
I
DCR
SAT
PART NUMBER (µH) (mA) (Ω)
SIZE (mm) MANUFACTURER
BRC20±6T220M 22 3±0 ±.3
CBC25±8T220M 22 320 ±.0 2.5 × ±.8 × ±.8 t-yuden.com
2 × ±.6 × ±.6 Taiyo Yuden
DC/DC Converter
LQH32CN220K53 22 250 0.92 3.2 × 2.5 × ±.6 Murata
murata.com
Theon-chipDC/DCconverteroperatesfromtheV input,
CC
generating a 7V V supply and a charge pumped –6.3V
DD
Capacitor Selection
V
EE
supply, as shown in Figure ±3. V and V power
DD EE
The small size of ceramic capacitors makes them ideal for
the LTC2872. Use X5R or X7R dielectric types; their ESR is
low and they retain their capacitance over relatively wide
voltage and temperature ranges. Use a voltage rating of
at least ±0V.
the output stage of the RS232 drivers and are regulated
to levels that guarantee greater than ±5V output swing.
The DC/DC converter requires a 22µH inductor (L±) and a
bypass capacitor (C4) of 2.2µF or larger. The charge pump
capacitor(C±)is470nFandthestoragecapacitors(C2and
C3) are 2.2µF. Larger storage capacitors up to 4.7µF may
be used if C± and C4 are scaled proportionately. Locate
C±-C4 close to their associated pins.
BypasscapacitorC5onthelogicsupplypincanbeomitted
if V is connected to V . See the V Logic Supply section
L
CC
L
for more details about the V logic supply.
L
2872f
17
LTC2872
applicaTions inForMaTion
Inrush Current and Supply Overshoot Precaution
In certain applications fast supply slew rates are gener-
by more than ±V for proper operation. Logic input pins
do not have internal biasing devices to pull them up or
down. They must be driven high or low to establish valid
logic levels; do not float.
ated when power is connected. If V ’s voltage is greater
CC
than 4.5V and its rise time is faster than ±0μs, the pins
V
and SW can exceed their Absolute Maximum values
DD
RS485 Driver
duringstart-up. WhensupplyvoltageisappliedtoV , the
CC
The RS485 driver provides full RS485/RS422 compat-
ibility. When enabled, if DI is high, Y–Z is positive. When
the driver is disabled, Y and Z output resistance is greater
than96k(typically±25k)togroundovertheentirecommon
mode range of –7V to ±2V. This resistance is equivalent
to the input resistance on these lines when the driver is
configured in half-duplex mode and Y and Z act as the
RS485 receiver inputs.
voltage difference between V and V generates inrush
CC
DD
currentflowingthroughinductorL±andcapacitorsC±and
C2. The peak inrush current must not exceed 2A. To avoid
this condition, add a ±Ω resistor as shown in Figure ±4.
This precaution is not relevant for supply voltages below
4.5V or rise times longer than ±0μs.
5V
0V
≤10µs
R1
C1
470nF
Driver Overvoltage and Overcurrent Protection
L1
22µH
1Ω
1/8W
The RS232 and RS485 driver outputs are protected from
shortcircuitstoanyvoltagewithintheAbsoluteMaximum
range ±±5V. The maximum current in this condition is
90mAfortheRS232driverand250mAfortheRS485driver.
INRUSH
C4
CURRENT
2.2µF
SW
CAP
GND
19
20
17
18
V
CC
21
If an RS485 driver output is shorted to a voltage greater
than V , when active high, positive current of about
2872 F14
CC
V
DD
±00mA can flow from the driver output back to V . If the
CC
C2
2.2µF
system power supply or loading cannot sink this excess
current, clamp V to GND with a Zener diode (e.g., 5.6V,
CC
Figure 14. Supply Current Overshoot Protection
for Input Supplies of 4.5V of Higher
±W, ±N4734) to prevent an overvoltage condition on V .
CC
All devices also feature thermal shutdown protection that
disables the drivers, receivers, and RS485 terminators in
case of excessive power dissipation (see Note 6).
V Logic Supply
L
A separate logic supply pin V allows the LTC2872 to
L
interface with any logic signal from ±.7V to 5.5V. All logic
RS485 Balanced Receiver with Full Failsafe Support
I/Os use V as their high supply. For proper operation, V
L
L
L
The LTC2872 RS485 receiver has a differential threshold
voltage that is about 80mV for signals that are rising
and –80mV for signals that are falling, as illustrated in
Figure ±5. If a differential input signal lingers in the win-
dow between these thresholds for more than about 2µs,
the rising threshold changes from 80mV to –50mV, while
the falling threshold remains at –80mV. Thus, differential
inputs that are shorted, open, or terminated but not driven
for more than 2µs produce a high on the receiver output,
indicating a failsafe condition.
should not be greater than V . During power-up, if V
CC
is higher than V , the device will not be damaged, but
CC
behavior of the device is not guaranteed. If V is not con-
L
nected to V , bypass V with a 0.±µF capacitor.
CC
L
RS232 and RS485 driver outputs are undriven and the
RS485 termination resistors are disabled when V or V
is grounded or V is disconnected.
L
CC
CC
Although all logic input pins reference V as their high
L
supply, they can be driven up to 7V, independent of V and
L
V , with the exception of FEN, which must not exceed V
CC
L
2872f
18
LTC2872
applicaTions inForMaTion
RA
lines, which establishes a logic-high state when all the
transmitters on the network are disabled. The values of
the biasing resistors depend on the number and type
of transceivers on the line and the number and value of
terminating resistors. Therefore, the values of the biasing
resistors must be customized to each specific network
installation, and may change if nodes are added to or
removed from the network.
RISING THRESHOLD
SHIFTS IF SIGNAL IS
IN WINDOW > ~2µs
TO SUPPORT
FAILSAFE
V
AB
(NOTE 5)
2872 F15
–80mV –50mV
0V
80mV
Figure 15. RS485 Receiver Input Threshold
Characteristics with Typical Values Shown
The internal failsafe feature of the LTC2872 eliminates the
need for external network biasing resistors provided they
are used in a network of transceivers with similar internal
failsafe features. This also allows the network to support a
high number of nodes, up to 256, by eliminating the bias
resistor loading. The LTC2872 transceivers will operate
correctly on biased, unbiased, or under-biased networks.
The benefit of this dual threshold architecture is that
it supports full failsafe operation yet offers a balanced
threshold, centered on 0V, for normal data signals. This
balance preserves duty cycle for small input signals with
heavily slewed edges, typical of what might be seen at the
end of a very long cable. This performance is highlighted
in Figure ±6, where a signal is driven through 4000 feet
of CAT5e cable at 3Mbps. Even though the differential
signal peaks at just over ±00mV and is heavily slewed,
the output maintains a nearly perfect signal with almost
no duty cycle distortion.
Receiver Outputs
The RS232 and RS485 receiver outputs are internally
drivenhigh(toV )orlow(toGND)withnoexternalpull-up
L
needed. When the receivers are disabled, the output pin
becomes Hi-Z with leakage of less than ±5μA for voltages
B
within the V supply range.
L
0.1V/DIV
A
RS485 Receiver Input Resistance
(A-B)
0.1V/DIV
The RS485 receiver input resistance from A or B to GND
(Y or Z to GND in half-duplex mode with driver disabled)
is greater than 96k (typically ±25k) when the integrated
termination is disabled. This permits up to a total of 256
receiverspersystemwithoutexceedingtheRS485receiver
loading specification. The input resistance of the receiver
isunaffectedbyenabling/disablingthereceiverorwhether
the part is in half-duplex, full-duplex, loopback mode, or
even unpowered. The equivalent input resistance looking
into the RS485 receiver pins is shown in Figure ±7.
RA
5V/DIV
2872 F16
200ns/DIV
Figure 16. A 3Mbps Signal Driven Down 4000ft of CAT5e
Cable. Top Traces: Received Signals After Transmission
Through Cable; Middle Trace: Math Showing Differences
of Top Two Signals; Bottom Trace: Receiver Output
An additional benefit of the balanced architecture is excel-
lent noise immunity due to the wide effective differential
input signal hysteresis of ±60mV for signals transitioning
through the window region in less than 2μs. Increasingly
slower signals will have increasingly less effective hyster-
esis, limited by the DC failsafe hysteresis of about 30mV.
125k
A
60Ω
TE485
60Ω
125k
B
RS485 Biasing Network Not Required
2872 F17
RS485 networks are often biased with a resistive divider
to generate a differential voltage of ≥200mV on the data
Figure 17. Equivalent RS485 Receiver
Input Resistance Into A and B (Note 5)
2872f
19
LTC2872
applicaTions inForMaTion
Selectable RS485 Termination
the differential receiver inputs. With the H/F pin set to
a logic-high, the Y and Z pins serve as the differential
inputs. In either configuration, the RS485 driver outputs
are always on Y and Z. The impedance looking into the
A and B pins is not affected by H/F control, including the
differential termination resistance. The H/F control does
not affect RS232 operation.
Propercableterminationisimportantforgoodsignalfidel-
ity. When the cable is not terminated with its characteristic
impedance, reflections cause waveform distortion.
TheLTC2872offersintegratedswitchable±20Ωtermination
resistors between the differential receiver inputs and also
between the differential driver outputs. This provides the
advantage of being able to easily change, through logic
control, the proper line termination for correct operation
whenconfiguringtransceivernetworks.Terminationshould
be enabled on transceivers positioned at both ends of a
network bus.
Logic Loopback
A loopback mode connects the driver inputs to the re-
ceiver outputs (noninverting) for self test. This applies
to both RS232 and RS485 transceivers. Loopback mode
is entered when the LB pin is set to a logic-high and the
relevant receiver is enabled.
Termination on the driver nodes is important for cases
wherethedriverisdisabledbutthereiscommunicationon
the connecting bus from another node. Driver termination
across Y and Z can be disabled independently from the
termination across A and B by setting DZ low. See Table 7
for details.
In loopback mode, the drivers function normally. They
can be disabled with output in a Hi-Z state or left enabled
to allow loopback testing in normal operation. Loopback
works in half- or full-duplex modes and does not affect
the termination resistors.
The termination resistance is maintained over the entire
RS485 common mode range of –7V to ±2V as shown in
Figure ±8. The voltage across pins with the terminating
resistor enabled should not exceed 6V as indicated in the
Absolute Maximum Ratings table.
RS485 Cable Length vs Data Rate
Many factors contribute to the maximum cable length
that can be used for for RS485 or RS422 communication,
including driver transition times, receiver threshold, duty
cycle distortion, cable properties and data rate. A typical
curve of cable length versus maximum data rate is shown
in Figure ±9. Various regions of this curve reflect different
performance limiting factors in data transmission.
126
V
CC
V
CC
= 5.0V
= 3.3V
124
122
120
118
116
10k
1k
LTC2872
MAX DATA RATE
–10
–5
0
5
10
15
VOLTAGE (V)
100
2872 F18
Figure 18. Typical Resistance of the Enabled RS485
Terminator vs Common Mode Voltage of A and B
RS485/RS422
MAX DATA RATE
10
10k
100k
1M
10M
100M
RS485 Half- and Full-Duplex Control
DATA RATE (bps)
2872 F19
TheLTC2872isequippedwithacontroltochangetheRS485
transceiveroperationfromfull-duplextohalf-duplex.With
the H/F pin set to a logic-low, the A and B pins serve as
Figure 19. Cable Length vs Data Rate (RS485/RS422
Standard Shown in Vertical Solid Line)
2872f
20
LTC2872
applicaTions inForMaTion
At frequencies below ±00kbps, the maximum cable length
is determined by DC resistance in the cable. In this ex-
ample, a cable longer than 4000ft will attenuate the signal
at the far end to less than what can be reliably detected
by the receiver.
Pins ± and 3± if the traces back to the 2.2µF capacitor
are indirect or narrow. These V pins mainly service the
CC
transceivers#±and#2,respectively. Table±±summarizes
the bypass capacitor requirements. The capacitors listed
in the table should be placed closest to their respective
supply and ground pin.
Fordataratesabove±00kbps, thecapacitiveandinductive
properties of the cable begin to dominate this relation-
ship. The attenuation of the cable is frequency and length
dependent, resulting in increased rise and fall times at
the far end of the cable. At high data rates or long cable
lengths, these transition times become a significant part
of the signal bit time. Jitter and intersymbol interference
aggravate this so that the time window for capturing valid
data at the receiver becomes impossibly small.
Table 11. Bypass Capacitor Requirements
CAPACITOR
2.2µF
SUPPLY (PIN)
RETURN (PIN)
GND (±8)
GND (±8)
GND (±8)
GND (34)
GND (5)
COMMENT
Required
Required
Required
Required*
Optional
V
(2±)
(20)
(39)
CC
DD
2.2 µF
2.2uF
V
V
EE
0.±µF
V (35)
L
0.±µF
V
(±)
CC
0.±µF
V
(3±)
GND (27)
Optional
CC
* If V is not connected to V
.
The boundary at 20Mbps in Figure ±9 represents the
guaranteed maximum operating rate of the LTC2872. The
dashed vertical line at ±0Mbps represents the specified
maximum data rate in the RS485 standard. This boundary
is not a limit, but reflects the maximum data rate that the
specification was written for.
L
CC
Place the charge pump capacitor, C±, directly adjacent to
the SW and CAP pins, with no more than one centimeter
of total trace length to maintain low inductance. Close
placement of the inductor, L±, is of secondary importance
compared to the placement of C± but should include no
more than two centimeters of total trace length.
It should be emphasized that the plot in Figure ±9 shows
a typical relation between maximum data rate and cable
length. Results with the LTC2872 will vary, depending on
cable properties such as conductor gauge, characteristic
impedance, insulation material, and solid versus stranded
conductors.
The PC board traces connected to high speed signals A/B
and Y/Z should be symmetrical and as short as possible
to minimize capacitive imbalance and to maintain good
differential signal integrity. To minimize capacitive loading
effects, the differential signals should be separated by
more than the width of a trace and should not be routed
on top of each other if they are on different signal planes.
Layout Considerations
All V pins must be connected together and all ground
CC
Care should be taken to route outputs away from any sen-
sitive inputs to reduce feedback effects that might cause
noise, jitter, or even oscillations. For example, DI and A/B
should not be routed near the driver or receiver outputs.
pins must be connected together on the PC board with
very low impedance traces or dedicated planes. A 2.2µF,
or larger, bypass capacitor should be placed less than
0.7cm away from V Pin 2±. This V pin, as well as GND
CC
CC
Pin ±8, mainly service the DC/DC converter. Additional
bypass capacitors of 0.±µF or larger, can be added to V
CC
2872f
21
LTC2872
Typical applicaTions
VCC = 3V to 5.5V, VL = 1.7V to VCC. Logic input pins not shown are tied to a valid logic
state. External components necessary for operation are not shown.
V
V
V
L
L
L
LTC2872
485/232_1
LTC2872
LTC2872
LTC2872
485/232_1
485/232_2
485/232_2 485/232_1
485/232_1 485/232_2
H/F
LB
GND
485/232_2
H/F
LB
H/F
LB
LB
GND
GND
DY1
Y1
DY1
Y1
Y1
Y1
DZ1
RA1
Z1
A1
DY1
DY1
RA1
DZ1
RA1
Z1
A1
Z1
Z1
A1
A1
RB1
B1
RB1
DY2
B1
Y2
B1
Y2
RB1
B1
Y2
DY2
Y2
DY2
RA2
Z2
A2
DZ2
RA2
Z2
A2
DZ2
RA2
Z2
A2
DY2
RA2
Z2
A2
B2
B2
RB2
B2
RB2
B2
2872 F20
PORT 1: RS232
PORT 2: RS232
PORT 1: RS232
PORT 2: RS485
PORT 1: RS485
PORT 2: RS232
PORT 1: RS485
PORT 2: RS485
Figure 20. LTC2872 in Various Basic Port Configurations
V
L
V
V
L
L
LTC2872
LTC2872
LTC2872
DZ2
H/F
LB
GND
TE485_1
TE485_2
DZ1
485/232_1
485/232_2
LB
485/232_1
RXEN1
RXEN2
H/F
TE485_1
TE485_2
485/232_1
485/232_2
DZ1
H/F
LB
GND
485/232_2
GND
DZ2
DY1
Y1
Y1
Y1
DZ1
RA1
Z1
A1
DY1
RA1
120Ω
Z1
DY1
RA1
120Ω
Z1
A1
A1
120Ω
B1
120Ω
RB1
B1
Y2
B1
Y2
Y2
DY2
RA2
DY2
RA2
Z2
A2
DY2
RA2
120Ω
Z2
A2
Z2
A2
120Ω
B2
B2
120Ω
B2
2872 F22
2872 F21
2872 F23
Figure 21. Loopback in
RS232 and RS485 Modes
Figure 22. Half-Duplex RS485
Mode with Driver and Receiver Line
Termination on Each Port
Figure 23. Full-Duplex RS485 Mode
with Driver and Receiver Line
Termination on Port 1, and Receiver-
Only Termination on Port 2
2872f
22
LTC2872
Typical applicaTions
VCC = 3V to 5.5V, VL = 1.7V to VCC. Logic input pins not shown are tied to a valid logic
state. External components necessary for operation are not shown.
½ LTC2872
V
L
H/F
TE485
½ LTC2872
½ LTC2872
120Ω
120Ω
V
V
L
L
TE485
DZ
TE485
DZ
H/F
H/F
2872 F24
Figure 24. Typical RS485 Half Duplex Network
½ LTC2872
TE485
H/F
MASTER
½ LTC2872
SLAVE
½ LTC2872
120Ω
120Ω
120Ω
V
V
L
L
TE485
DZ
H/F
TE485
DZ
H/F
2872 F25
Figure 25. Typical RS485 Full Duplex Network
2872f
23
LTC2872
Typical applicaTions
VCC = 3V to 5.5V, VL = 1.7V to VCC. Logic input pins not shown are tied to a valid logic
state. External components necessary for operation are not shown.
LTC2872
H/F
S3
RS485
INTERFACE
Y1
Z1
INPUT1
RA1
OUTPUT
A1
RXEN1
H/F
S1
INPUT2
INPUT3
B1
Y2
Z2
RA2
A2
B2
RXEN2
S2
INPUT4
2872 F26
S1
0
S2
1
S3
1
SELECTED INPUT
INPUT1
0
1
0
INPUT2
1
0
1
INPUT3
1
0
0
INPUT4
1
1
X
X
NONE/Hi-Z
INVALID
0
0
Figure 26. RS485 Receiver with 4-Way Selectable Inputs
2872f
24
LTC2872
Typical applicaTions
VCC = 3V to 5.5V, VL = 1.7V to VCC. Logic input pins not shown are tied to a valid logic
state. External components necessary for operation are not shown.
LTC2872
LTC2872
RA1
A1
A2
RB1
B1
RS232
INPUT
RS232
INPUT
OUT1
S1
OUT1
S1
RXEN1
RXEN1
R
R
IN
IN
–OR–
RA2
RB2
B2
OUT2
S2
OUT2
S2
RXEN2
RXEN2
2872 F27
S1
S2
1
R
ACTIVE OUTPUT
OUT1
IN
0
1
1
0
5k
0
5k
OUT2
1
62.5k
2.5k*
NONE (Hi-Z)
OUT1, OUT2
0
* DOES NOT MEET RS232 SPECIFICATIONS
Figure 27. Sharing RS232 Receiver Inputs
3V TO 5.5V
1.7V TO V
CC
LTC2872
V
V
CC
L
µP
LOGIC
LEVEL
SIGNALS
LINE
LEVEL
SIGNALS
RS232
AND/OR
RS485
GND
2872 F28
Figure 28. Low Voltage Microprocessor Interface
2872f
25
LTC2872
Typical applicaTions
VCC = 3V to 5.5V, VL = 1.7V to VCC. Logic input pins not shown are tied to a valid logic
state. External components necessary for operation are not shown.
RA1
DY2
LTC2872
A1
Y2
RS232
IN
RS485
OUT
Z2
A2
Y1
RS232
OUT
RS485
IN
120Ω
B2
DY1
RA2
2872 F29
Figure 29. RS232 ↔ RS485 Conversion
RA1
DY2
LTC2872
A1
Y2
120Ω
120Ω
120Ω
B1
Y1
Z2
A2
120Ω
Z1
B2
DY1
RA2
2872 F29
Figure 30. RS485 Repeater
2872f
26
LTC2872
package DescripTion
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
UHF Package
38-Lead Plastic QFN (5mm × 7mm)
(Reference LTC DWG # 05-08-±70± Rev C)
0.70 ± 0.05
5.50 ± 0.05
5.15 0.05
4.10 ± 0.05
3.15 0.05
3.00 REF
PACKAGE
OUTLINE
0.25 ± 0.05
0.50 BSC
5.5 REF
6.10 ± 0.05
7.50 ± 0.05
RECOMMENDED SOLDER PAD LAYOUT
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
PIN 1 NOTCH
R = 0.30 TYP OR
0.35 × 45° CHAMFER
0.75 ± 0.05
3.00 REF
5.00 ± 0.10
37 38
0.00 – 0.05
0.40 ±0.10
PIN 1
TOP MARK
1
2
(SEE NOTE 6)
5.15 0.10
5.50 REF
7.00 ± 0.10
3.15 0.10
(UH) QFN REF C 1107
0.200 REF 0.25 ± 0.05
R = 0.125
TYP
R = 0.10
TYP
0.50 BSC
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING CONFORMS TO JEDEC PACKAGE
OUTLINE M0-220 VARIATION WHKD
2. DRAWING NOT TO SCALE
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.20mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
3. ALL DIMENSIONS ARE IN MILLIMETERS
2872f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
27
LTC2872
Typical applicaTion
5V
3.3V
470nF
470nF
22µH
22µH
2.2µF
2.2µF
V
L
SW
CAP
V
L
SW
CAP
DZ2
LB
GND
1.8V
CC
CC
V
485/232_2
TE485_2
LB
V
485/232_1
TE485_1
DZ1
485/232_1
485/232_2
TE485_1
TE485_2
DZ1
0.1µF
LTC2872
LTC2872
GND
H/F
H/F
RS485
Y1
Y1
DY1
RA1
DYI
120Ω
Z1
120Ω
Z1
CAT5e
CABLE
A1
A1
RA1
120Ω
B1
120Ω
B1
3.3V
INTERFACE
Y2
1.8V
INTERFACE
DY2
Y2
DY2
RA2
Z2
A2
DZ2
RA2
Z2
A2
RS232
120Ω
B2
RA2
A2
V
V
V
DD
V
EE
DD
EE
2872 F31
2.2µF
2.2µF
2.2µF
2.2µF
Figure 31. LTC2872 on Left: RS485 Half-Duplex and Terminated, Plus RS232.
LTC2872 on Right: Dual RS485 Half-Duplex and Terminated. All External Components Shown
relaTeD parTs
PART NUMBER
DESCRIPTION
COMMENTS
LTC2870/LTC287±
RS232/RS485 Multiprotocol Transceivers with
Integrated Termination
3V to 5.5V Supply, Automatic Selection of Termination Resistors,
Duplex Control, Logic Supply Pin, ±26kV ESD
LTC±334
LTC±387
Single 5V RS232/RS485 Multiprotocol Transceiver Dual Port, Single 5V Supply, Configurable, ±±0kV ESD
Single 5V RS232/RS485 Multiprotocol Transceiver Single Port, Configurable
LTC280±/LTC2802/ ±.8V to 5.5V RS232 Single and Dual Transceivers Up to ±Mbps, ±±0kV ESD, Logic Supply Pin, Tiny DFN Packages
LTC2803/LTC2804
LTC2854/LTC2855
LTC2859/LTC286±
LTM288±
3.3V 20Mbps RS485 Transceiver with Integrated
Switchable Termination
3.3V Supply, Integrated, Switchable, ±20Ω Termination Resistor, ±25kV ESD
20Mbps RS485 Transceiver with Integrated
Switchable Termination
5V Supply, Integrated, Switchable, ±20Ω Termination Resistor, ±±5kV ESD
Complete Isolated RS485/RS422 μModule®
Transceiver + Power
20Mbps, 2500V
Isolation with Integrated DC/DC Converter,
RMS
Integrated Switchable ±20Ω Termination Resistor, ±±5kV ESD
Dual Isolated RS232 µModule Transceiver + Power ±Mbps, 2500V Isolation with Integrated DC/DC Converter, ±±0kV ESD
RMS
LTM2882
2872f
LT 0312 • PRINTED IN USA
LinearTechnology Corporation
±630 McCarthy Blvd., Milpitas, CA 95035-74±7
28
●
●
LINEAR TECHNOLOGY CORPORATION 2012
(408) 432-±900 FAX: (408) 434-0507 www.linear.com
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